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Description: 使用CPLD仿真8051核,内有源程序和说明,来之不易
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Size: 90517 |
Author: 梁志洪 |
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Description: 51的VERILOG代码!适用于Xilinx的FPGA-51 VERILOG code! In Xilinx FPGA
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Size: 1220608 |
Author: 林建加 |
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Description: 8051的Verilog-Verilog OF 8051
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Size: 2189312 |
Author: 德德 |
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Description: 用verilog写的很好的cpu core-using Verilog write a good cpu core
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Size: 52224 |
Author: 刘烨波 |
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Description: 流片过的risc_8051源代码
verilog语言描述的~-flow unit off risc_8051 verilog language source code described in the ~
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Size: 36864 |
Author: 李明纬 |
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Description: 符合8051协议规范的UART的Verilog源代码.该压缩包是一个modelsim的工程.-8051 agreement in line with the norms of the Verilog source code UART. The Compression Pack is a ModelSim project.
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Size: 41984 |
Author: 王亮 |
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Description: 利用拨码开关为可编程器件输入读写命令和相应的地址、数据,8051读入可编程器件设定的命令字并根据可编程器件的设置进行读写操作,读出来的数据通过P0输出给可编程器件,并由可编程器件控制七段数码管显示。(Verilog+单片机)-DIP switch for the use of programmable devices to read and write command input and the corresponding address, data, read into the programmable device 8051 set the word order and in accordance with programmable device settings for read and write operations, read out the data through P0 output to the programmable device, programmable device controlled by the Seven-Segment LED display. (Verilog+ Singlechip)
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Size: 3072 |
Author: 辛颖 |
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Description: 8051的内核代码(verilog语言),大家共享-8051 kernel code (verilog language), we share
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Size: 326656 |
Author: 侯典华 |
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Description: Verilog版的C51核(DW8051)-Verilog version of the C51 core (DW8051)
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Size: 67584 |
Author: |
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Description: Synopsys 公司的DW8051源代码,用verilog编写的,代码很完整,可以仿真,对采用8051核做嵌入式的人很有帮助-Synopsys company DW8051 source code, written with Verilog, the code is complete, can be simulated using 8051 nuclear helpful people who do Embedded
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Size: 68608 |
Author: jy |
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Description: 8051单片机源码verilog版本
包括rtl, testbench, synthesis
-Verilog source code version of 8051, including rtl, testbench, synthesis
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Size: 508928 |
Author: carol |
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Description: Verilog 8051 IP Core for Cyclone -Verilog 8051 IP Core for Cyclone II
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Size: 63488 |
Author: Alx |
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Description: 8051内核的设计,用Verilog硬件描述语言实现,在modelsim环境下进行仿真。-8051-core design, using Verilog hardware description language, in the modelsim simulation environment.
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Size: 396288 |
Author: huangguilin |
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Description: Xilinx EDK中SOC使用外部存储器接口(EMC)的方法,并用ISP1581举例说明了如何与时分复用总线(8051单片机总线)设备进行连接,有Verilog源代码。-Xilinx EDK in SOC using external memory interface (EMC) methods, and examples of how ISP1581 with the TDM bus (8051 bus) devices to connect, there Verilog source code.
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Size: 59392 |
Author: YongZhiLi |
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Description: 8051核,verilog实现。可以直接用在FPGA中,在此基础上可以和用真正的8051一样的进行单片机的学习。-8051 Nuclear, verilog achieve. Can be directly used in the FPGA, in this basis can be used as the real conduct of the 8051 single-chip learning.
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Size: 310272 |
Author: caibaiyin |
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Description: 利用FPGA可编程的特点,在内部编写了一个8051单片机软核。已通过调试。-The use of FPGA programmable features, in-house preparation of a 8051 soft-core. Passed debugging.
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Size: 55296 |
Author: ql |
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Description: 8051 IP, 使用veriog实现,在Altera9.0环境下编译通过-8051 IP in verilog, which is verified in Altera9.0 environmen.
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Size: 51200 |
Author: dylan huang |
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Description:
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Size: 53248 |
Author: 小方 |
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Description: 8051的Verilog源代码,包含说明文件,RTL文件,工程等-8051 Verilog source code, including documentation, RTL files, engineering, etc.
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Size: 301056 |
Author: HP_ccyz2012 |
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Description: Actel 8051 Verilog core
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Size: 428032 |
Author: Dilogic |
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